发明名称 |
INTEGRATED CIRCUIT TESTING SYSTEM |
摘要 |
PROBLEM TO BE SOLVED: To provide an integrated circuit testing system capable of extracting a failure candidate node at immediately after testing. SOLUTION: The integrated circuit testing system includes a failure simulator 1 and an integrated circuit testing device 5. Therein, the failure simulator 1 comprises a failure simulating part performing a failure simulation by using first STIL test data 3 written by STIL language and an STIL test data generating part generating second STIL test data 6 with failure candidate node information written with the first STIL test data 3, which specifies a failure candidate node for each failure candidate address based on failure dictionary information obtained from the failure simulation; the integrated circuit testing device 5 comprises a testing part performing a test for an integrated circuit to be tested by using the second STIL test data 6. COPYRIGHT: (C)2005,JPO&NCIPI
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申请公布号 |
JP2004340789(A) |
申请公布日期 |
2004.12.02 |
申请号 |
JP20030138688 |
申请日期 |
2003.05.16 |
申请人 |
TOSHIBA MICROELECTRONICS CORP;TOSHIBA CORP |
发明人 |
TERADA HIROAKI;WATANABE KAZUHIRO;GOTO NAOKI;INOUE YUSUKE |
分类号 |
G01R31/28;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
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