发明名称 Passivation scheme for bumped wafers
摘要 A bumped wafer for use in making a chip device. The bumped wafer includes two titanium layers sputtered altematingly with two copper layers over a non-passivated die. The bumped wafer further includes under bump material under solder bumps contained thereon.
申请公布号 US2004241977(A1) 申请公布日期 2004.12.02
申请号 US20040818647 申请日期 2004.04.05
申请人 FAIRCHILD SEMICONDUCTOR CORPORATION 发明人 JOSHI RAJEEV
分类号 H01L21/60;H01L23/485;(IPC1-7):H01L21/44 主分类号 H01L21/60
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