Dram memory cell has select transistor with a gate electrode surrounding at least two sides of the channel and a memory capacitor

摘要

A DRAM memory cell comprises a select transistor (200) on a semiconductor substrate with source/ drain electrodes (201,202), a channel layer (203), an isolated gate electrode, a memory capacitor (100) with two electrodes, one connected to the source/drain and a rear substrate electrode. The gate electrode surrounds opposite sides of the channel. An independent claim is also included for a production process for the above DRAM.