发明名称 |
ADDRESS CONVERSION BUFFER POWER CONTROL METHOD AND DEVICE THEREOF |
摘要 |
<p>Power consumption in vain is reduced by controlling power cut off of a power source of an entry which has not been used for a long time in a TLB. An address conversion buffer power consumption control method for controlling power consumption of an address conversion buffer arranged in a central processing unit including the address conversion buffer having a plurality of entries for performing conversion from a logical address to a physical address and an entry replacing mechanism of the address conversion buffer. The method includes an entry selection step for selecting some entries from the plurality of entries of the address conversion buffer according to an output of the entry replacing mechanism and according to a predetermined standard and a power control step for controlling the power of the entries selected.</p> |
申请公布号 |
WO2004104841(A1) |
申请公布日期 |
2004.12.02 |
申请号 |
WO2003JP06359 |
申请日期 |
2003.05.21 |
申请人 |
FUJITSU LIMITED;YOSHIMI, KOICHI |
发明人 |
YOSHIMI, KOICHI |
分类号 |
G06F1/32;G06F12/08;G06F12/10;G06F12/12;G11C8/06;(IPC1-7):G06F12/10;G11C15/00 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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