Electronic development system, has field programmable gate array logic devices comprising communication device, where input and output terminals of logic devices are arranged on periphery of system through connectors

摘要

The system has field programmable gate array logic devices (FPGAs) (6) provided with a communication device i.e. controller universal serial bus (CUSB) (3), to establish a communication channel (2) between a computer (1) and the FPGA logic devices. A bridge is formed between a Universal serial bus (USB)and a Joint test action group (JTAG)interface (4). A parallel bus (5) is connected with the FPGA logic devices. Input and output terminals of the FPGA logic devices are arranged on periphery of the system through connectors (7-9).