发明名称 BIT MANIPULATION OPERATION CIRCUIT OF A PROGRAMMABLE PROCESSOR AND AN OPERATING METHOD THEREOF, CONCERNED WITH ENHANCING AN OPERATING SPEED RELATED TO UNIT OPERATIONS
摘要 PURPOSE: A bit manipulation operation circuit of a programmable processor and an operating method thereof are provided to enhance an operating speed related to unit operations by performing rapidly the repeated operations and the unit operations. CONSTITUTION: A bit manipulation operation circuit includes a shift addition array and a bit extraction/insertion unit. The shift addition array(120) is used for receiving target data, generating plural shift data shifted from the target data as much as 1-bit or bits of target data, performing a modulo-2 addition process for the target data and the shift data, and storing a calculated result into a register bank(110). The bit extraction/insertion unit(122) receives the target data, extracts plural bits from the target data, inserting the extracted bits into predetermined bit positions of completed data, and storing the completed data into the register bank.
申请公布号 KR20040099147(A) 申请公布日期 2004.11.26
申请号 KR20040034128 申请日期 2004.05.14
申请人 DAEWOO EDUCATIONAL FOUNDATION 发明人 JUNG, SEOK HYEON;SUNWOO, MYEONG HUN
分类号 H03M7/00;G06F7/00;G06F7/76;H03M13/00;H03M13/23;H03M13/27;(IPC1-7):H03M7/00 主分类号 H03M7/00
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