发明名称 Method, system and device for a processor to access devices of different speeds using a standard memory bus
摘要 A method for accessing a device, such as a memory device and an interface device, by a processor is disclosed. The method involves the processor requesting access permission for the transfer of data. The bridge device grants access permission. The processor in response to the granting of access permission indicates that the processor is busy with the access. The processor also generates address and control signals for the access. The bridge device indicates that data is ready for transfer. A processing system including the processor and the bridge device is also disclosed.
申请公布号 US2004236892(A1) 申请公布日期 2004.11.25
申请号 US20040793360 申请日期 2004.03.03
申请人 ZHU DE SHENG 发明人 ZHU DE SHENG
分类号 G06F13/00;G06F13/40;(IPC1-7):G06F13/00 主分类号 G06F13/00
代理机构 代理人
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