发明名称 |
INFORMATION PROCESSOR AND ELECTRONIC DEVICE |
摘要 |
<p>An information processor and an electronic device for transmitting data at high speed, even being of asynchronous type. A microcomputer (140) includes a communication unit (142) which comprises a frequency dividing circuit (146) for diving the frequency of BCLK and generating SMC1 (clock pulses for smapling bits of data transmitted by asynchronous scheme) and a transmitting/receiving circuit (144) for transmitting/receiving data at the timings of SMC1. BCLK is also fed to a debugging tool (150) as a singal from which a frequency dividing circuit (156) generates SMC2. A frequency-division ratio control section (158) changes the frequency-division ratio FD2 depending on the frequency of BCLK, and send the frequency-division ratio data to the communication unit (142). According to the frequency-division data, a frequency-division ratio control section (148) changes the frequency-division ratio FD1 used at the frequency dividing circuit (146). In such a way, data can be transmitted always the most suitably at high transmission speed. BCLK is also used as a clock for sampling trace data in a user's program execution mode.</p> |
申请公布号 |
WO2004102387(A1) |
申请公布日期 |
2004.11.25 |
申请号 |
WO1999JP01650 |
申请日期 |
1999.03.31 |
申请人 |
HIJIKATA, YOICHI;KUDO, MAKOTO |
发明人 |
HIJIKATA, YOICHI;KUDO, MAKOTO |
分类号 |
G06F11/36;G06F11/22;G06F1/08;G06F13/38;H04L7/04;(IPC1-7):G06F11/22;G06F11/28 |
主分类号 |
G06F11/36 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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