| 摘要 |
PROBLEM TO BE SOLVED: To provide a logic simulation apparatus, which extracts only parts, the logic of which is affected by circuit change, performs logic simulation, and shortens logic simulation execution time when performing logic simulation after circuit change using test patterns executed before circuit change. SOLUTION: A circuit connection information comparator 2 detects changed cells through comparison of circuit connection information between before and after circuit change. A circuit search part 4 detects logic cones that are affected by cells changed based on circuit connection information after circuit change. An allocation processing part 6 allocates delay values, event transmission information and timing check values to only cells within logic cones affected by changed cells, and a simulation execution part 8 performs logic simulation for only the cells assigned with delay values, event transmission information and timing check values. COPYRIGHT: (C)2005,JPO&NCIPI
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