发明名称 MULTIPORT MEMORY
摘要 PROBLEM TO BE SOLVED: To prevent reduction of computing performance of a plurality of microprocessors 1a, 1b accessing a multiport memory 4. SOLUTION: An arbitration circuit 2 is provided with: wait timers 7a, 7b each outputting a timer signal when detecting that an access waiting state continues over a prescribed time from a wait signal; an access right decision means 5 outputting a changeover signal such that one microprocessor 1a can access the multiport memory 4 on the basis of the timer signal and outputting the wait signal showing access wait to the other microprocessor 1b when access signals from the plurality of microprocessors 1a, 1b compete with each other; and a changeover means changing over a signal from the corresponding microprocessor 1b on the basis of the changeover signal, and outputting it to a single-port memory 3 to allow the access. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004334361(A) 申请公布日期 2004.11.25
申请号 JP20030126229 申请日期 2003.05.01
申请人 TOSHIBA CORP 发明人 SATO YUKIO;SATO SUSUMU
分类号 G06F15/167;G06F12/00;(IPC1-7):G06F12/00 主分类号 G06F15/167
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