| 摘要 |
The present invention relates to test systems for testing integrated circuit devices. One embodiment of the invention provides a portion of a test system including: on a single CMOS IC, a timing generation circuit; and a formatter coupled to the timing generation circuit. The timing generation circuit generates software words, the formatter receives the software words and provides a specified number of transitions per second and a specified edge placement resolution and accuracy. The formatter includes: a drive circuit and a response circuit. The drive circuit includes a plurality of slices. Each slice receives an independent data stream and produces an independent formatted level. The response circuit includes a plurality of slices. Each slice receives an independent data stream and produces an independent strobe marker. |
