| 摘要 |
Integrated circuit device that uses tristate switching means (12; 46, 47, 54) to disconnect input/output pins (10) from input buffers (14) during a power down mode (LP = high), thereby preventing current leakage through partially turned on MOS transistors inside input buffers. A transition detection means (42; 60-74) connected between the input/output pins and the controlling inputs (26; gates of 46, 47) of the tristate switching means monitors electronic signal (50) at the input/output pins while the chip is in a power-down mode and turns on the tristate switching means when a signal transition is detected. |
