| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device wherein gate-drain parasitic capacity is reduced by forming the semiconductor device so as to reduce a chip area while reducing the resistance of gate electrodes. SOLUTION: On a semiconductor area, a plurality of the gate electrodes 11 are formed in parallel via gate insulation films. In the surface area of the semiconductor area, a plurality of drain areas and source areas are formed in parallel to the longitudinal direction of the gate electrodes 11. First drain wires and source wires 17 are formed on the drain areas and source areas. A gate wire 12 is formed in a direction vertical to the longitudinal direction of the gate electrodes 11 and connected via gate contacts 13 provided on the gate electrodes 11. Second drain wires 15 are formed in the direction vertical to the longitudinal direction of the gate electrodes 11 and connected via drain contacts 16 provided on the first drain wire. COPYRIGHT: (C)2005,JPO&NCIPI |
