Method of fabricating memory device with vertical transistors and trench capacitors

摘要

A method for fabricating a memory device with a vertical transistor and a trench capacitor. First, a capacitor is formed in a lower portion of a trench formed in a substrate. Next, a wiring structure and a first trench top isolation layer are successively formed overlying the capacitor. Next, a dielectric spacer is formed over the sidewall of the trench and overlying the first trench top isolation layer. Thereafter, the first trench top isolation layer is removed to expose the sidewall of the trench between the dielectric spacer and the wiring structure. Next, a buried strap is formed in the substrate around the exposed sidewall of the trench. Thereafter, the dielectric spacer is removed. Next, a second trench top isolation layer is formed overlying the wiring structure. Finally, a control gate is formed overlying the second trench top isolation layer.