发明名称 |
A method for determining the current-voltage characteristic of a snap-back device |
摘要 |
The present invention relates to a method and system for evaluating the IV characteristics of devices where negative resistance behavior is observed. More particularly the present invention relates to a method and system for evaluating accurately the electrical overstress or ESD performance of semiconductor devices during the voltage transition region (positive to negative). The method comprises applying a signal comprising at least two amplitudes within the pulse. By suitably adjusting the amplitude of the first level, such that it is high enough to trigger the device-under-test, and subsequently applying one or more levels within the same signal while keeping the device-under-test in the on-state, the device IV characteristics can be comprehensively extracted, without being limited by the system loadline. The method only requires a rectangular pulse testing set-up, also known as transmission line measurement set-up, with a single loadline characteristic to determine a portion or the complete ESD characteristic of the device-under test. <IMAGE>
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申请公布号 |
EP1480046(A1) |
申请公布日期 |
2004.11.24 |
申请号 |
EP20030447121 |
申请日期 |
2003.05.23 |
申请人 |
INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM ( IMEC) |
发明人 |
IYER, NATARAJAN MAHADEVA;THIJS, STEVEN;VASSILEV, VESSELIN;DAENEN, TOM;DE HEYN, VINCENT |
分类号 |
G01R27/02;G01R27/08;G01R31/00;G01R31/26;(IPC1-7):G01R31/26 |
主分类号 |
G01R27/02 |
代理机构 |
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主权项 |
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地址 |
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