REDUNDANCY DRIVING CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE, ESPECIALLY DETECTING THE POSITION OF REDUNDANCY BLOCK IN REDUNDANCY CELL WHICH IS CORRECTED IN THE TEST

摘要

PURPOSE: A redundancy driving circuit in a semiconductor memory device is provided to improve manufacturing yield by determining pass/fail situations by combining correction address information and redundancy cell test results. CONSTITUTION: Each of plural redundancy boxes receives internal address signals, redundancy cell test driving signals, and correction recognition driving signals and generates a word line driving signal and a correction cell address recognition signal. A NOR logic receives the correction cell address recognition signal generated at each of the redundancy boxes. An inverter generates a correction recognition output signal from the output of the NOR logic. The output driver outputs a redundancy cell test result in response to the correction recognition output signal.