发明名称 Analog/digital converter that employs phase comparison
摘要 An analog/digital converter includes a first transfer circuit which receives an input voltage and outputs an output clock signal having a phase delay that is dependent on the input voltage, a second transfer circuit which receives a reference voltage and an input clock signal and outputs a reference clock signal having a phase delay that is dependent on the reference voltage, and a comparator which compares the output clock signal and the reference clock signal and outputs a digitally-coded output signal that is based on the result of the phase comparison of the output clock signal and the reference clock signal.
申请公布号 US6822596(B2) 申请公布日期 2004.11.23
申请号 US20020287919 申请日期 2002.11.05
申请人 AUSTRIAMICROSYSTEM AG 发明人 THEILER HELMUT
分类号 H03M1/64;(IPC1-7):H03M1/12 主分类号 H03M1/64
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