发明名称 Clock generator
摘要 A system and method of generating a clock. A first clock is accessed. A delayed version of the first clock is created. A second clock signal is generated. A first edge of the second clock signal corresponds to a transition of the first clock signal, and a second edge of the second clock signal corresponds to a transition of the delayed version of the first clock signal.
申请公布号 US6822497(B1) 申请公布日期 2004.11.23
申请号 US20030460959 申请日期 2003.06.13
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 YAO JIANGUO;COURCY MATTHEW
分类号 G06F1/04;(IPC1-7):G06F1/04 主分类号 G06F1/04
代理机构 代理人
主权项
地址