| 摘要 |
A microprocessor system for safety-critical control operations includes at least three central units which are preferably located jointly on one chip and execute the same program. Further, there is provision of read-only memories and random-access memories with additional memory locations for test data, input and output units and comparators which check the output signals of the central units for correlation. The central units are interconnected by way of bus systems and bypasses which enable the central units to jointly read and process the existing data, including the test data and commands, according to the same program. The central units are extended by redundant periphery units into two complete control signal circuits and are interconnected in such a manner that, upon failure, the faulty central unit is identified by a majority decision and an emergency operation function is maintained.
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