发明名称 Method for separately optimizing thin gate dielectric of PMOS and NMOS transistors within the same semiconductor chip and device manufactured thereby
摘要 A method of forming CMOS semiconductor materials with PFET and NFET areas formed on a semiconductor substrate, covered respectively with a PFET and NFET gate dielectric layers composed of silicon oxide and different degrees of nitridation thereof. Provide a silicon substrate with a PFET area and an NFET area and form PFET and NFET gate oxide layers thereover. Provide nitridation of the PFET gate oxide layer above the PFET area to form the PFET gate dielectric layer above the PFET area with a first concentration level of nitrogen atoms in the PFET gate dielectric layer above the PFET area. Provide nitridation of the NFET gate oxide layer to form the NFET gate dielectric layer above the NFET area with a different concentration level of nitrogen atoms from the first concentration level. The NFET gate dielectric layer and the PFET gate dielectric layer can have the same thickness.
申请公布号 US6821833(B1) 申请公布日期 2004.11.23
申请号 US20030605110 申请日期 2003.09.09
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHOU ANTHONY I-CHIH;FURUKAWA TOSHIHARU;VAREKAMP PATRICK R.;SLEIGHT JEFFREY W.;SEKIGUCHI AKIHISA
分类号 H01L21/8238;(IPC1-7):H01L21/823 主分类号 H01L21/8238
代理机构 代理人
主权项
地址
您可能感兴趣的专利