| 摘要 |
A semiconductor integrated circuit capable of decreasing the amount of signal transmission when an FET is in an OFF state and of improving a variable ratio of the amount of signal transmission, including an inductor element provided between the source terminal and ground terminal of an FET; and Lo input matching circuit provided between the gate terminal and input terminal of the FET; a bias supply circuit connected to the gate terminal of the FET; an RF output matching circuit provided between the drain terminal and output terminal of the FET; a control signal input circuit connected to the drain terminal of the FET; and a bias supply circuit connected to the source terminal of the FET. Since the reactance component of the gate-to-source impedance of the FET series-resonates with the inductor element 1 when the FET is in the OFF state, the amount of signal transmission can be sufficiently small when the FET is in the OFF state, and the variable ratio of the amount of signal transmission can be improved.
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