发明名称 |
Synchronous semiconductor memory device having clock synchronization circuit and circuit for controlling on/off of clock tree of the clock synchronization circuit |
摘要 |
The present invention provides a semiconductor memory device for reducing power consumption by turning off a DLL clock tree in stand-by mode. The synchronous semiconductor memory device in accordance with the present invention includes a clock synchronization means for synchronizing a data output with a external clock; and a clock tree on/off control means for delaying an enable timing of a RAS idle signal for a predetermined time after a row inactive instruction is supplied, turning on/off a clock tree of the clock synchronization means in response to the RAS idle signal.
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申请公布号 |
US6822924(B2) |
申请公布日期 |
2004.11.23 |
申请号 |
US20030625173 |
申请日期 |
2003.07.22 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
LEE IHL-HO |
分类号 |
G11C8/00;G11C7/10;G11C11/22;(IPC1-7):G11C8/00 |
主分类号 |
G11C8/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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