发明名称
摘要 PURPOSE: A method for forming a gate electrode of a semiconductor device is provided to be capable of reducing the edge damage of the gate electrode by using an improved wafer bias. CONSTITUTION: An insulating layer and a conductive layer are sequentially formed on a semiconductor substrate. A gate electrode is formed by selectively etching the conductive layer. At this time, the gate electrode is formed by using two-step etching processes. That is, the conductive layer is anisotropically etched by using TM(Time Modulation) bias, and then over-etched by using CW(Continuous Wave) bias.
申请公布号 KR100457742(B1) 申请公布日期 2004.11.18
申请号 KR20020027094 申请日期 2002.05.16
申请人 发明人
分类号 H01L21/336 主分类号 H01L21/336
代理机构 代理人
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