发明名称 Method and apparatus for electrostatically aligning integrated circuits
摘要 One embodiment of the present invention provides a system that uses electrostatic forces to align semiconductor chips relative to each other. The system operates by fabricating a first set of conductors on the top surface of a first chip and fabricating a corresponding second set of conductors on the top surface of a second chip. To align the chips, the system electrically charges the first set of conductors and the second set of conductors. The system also places the first chip face-to-face with the second chip, so that the first set of conductors is in close proximity to the second set of conductors. This allows electrostatic forces between the first set of conductors and the second set of conductors to bring the first chip into alignment with the second chip and to hold them in place.
申请公布号 US2004227221(A1) 申请公布日期 2004.11.18
申请号 US20040759923 申请日期 2004.01.15
申请人 HARRIS DAVID L.;DROST ROBERT J.;SUTHERLAND IVAN E. 发明人 HARRIS DAVID L.;DROST ROBERT J.;SUTHERLAND IVAN E.
分类号 B65G1/00;B65G49/07;H01L21/44;H01L21/60;H01L21/98;H01L23/02;H01L23/48;H01L23/50;H01L23/538;H01L23/64;H01L25/065;(IPC1-7):H01L21/44 主分类号 B65G1/00
代理机构 代理人
主权项
地址