发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT AND VOLTAGE BOOSTING METHOD USING SAME |
摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit that has no parasitic motion such as latch-up and outputs a DC voltage boosted by a clock input signal, and a voltage boosting method using the same. SOLUTION: The voltage boosting circuit comprises: a first boosting circuit part 1a composed of a diode-connected transistor TR1 and a capacitor C1; a second boosting circuit part 1b composed of a diode-connected transistor TR2 and a capacitor C2; a (n-1)th boosting circuit part 1c composed of a diode-connected transistor TRN-1 and a capacitor CN-1; an n-th boosting circuit part 1d composed of a diode-connected transistor TRN; and a charge pump boosting circuit 2 composed of counters 3, 4. COPYRIGHT: (C)2005,JPO&NCIPI
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申请公布号 |
JP2004328901(A) |
申请公布日期 |
2004.11.18 |
申请号 |
JP20030120362 |
申请日期 |
2003.04.24 |
申请人 |
TOSHIBA MICROELECTRONICS CORP;TOSHIBA CORP |
发明人 |
MIURA HIRONORI;TANABE TAKESHI;AMANO KATSUMOTO;ITO YUICHI;SATO JUN;TAKASE HIDEKI;HINAKO TAKESHI |
分类号 |
H01L27/04;H01L21/822;H02M3/07;(IPC1-7):H02M3/07 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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