| 摘要 |
In a computer system, a method for executing a Test under Mask instruction in the Fixed Execution Unit (FXU) allows for the execution of these instructions in just one cycle single execution cycle inside the FXU without adding any dedicated data flow circuitry by giving the highest priority to the leftmost selected bit in the operand. The preferred method breaks the execution of each instruction into four different micro-operations that can be executed in parallel in one CPU cycle, and during the E0 cycle of these instructions, data from a first operand and from the Test under Mask instruction are loaded into the two working registers, an A-reg and a B-reg, and then, during the E1 dispatch cycle, the A-reg is rotated by the amount of 32-bits to align the bits of the mask with the corresponding bits of the first operand, and during the same E1 dispatch cycle micro-operations are executed in the Fixed Execution Unit (FXU) giving the highest priority to the leftmost selected bit in the operand and the outcome of these micro-operations is used to calculate the condition code (CC) to implement the Test under Mask as a one-cycle implementation for test under mask instructions and the results of the execution sets the condition code.
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