发明名称 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE TO REDUCE FABRICATING COST
摘要 <p>PURPOSE: A method for fabricating a semiconductor device is provided to reduce fabricating cost by using a conventional method for fabricating a resin substrate without an expensive fabricating system. CONSTITUTION: A via(28a) electrically connected to an electrode terminal(12) and another conductor part are formed on an electrode terminal formation surface of a semiconductor wafer. The semiconductor wafer is diced into independent semiconductor chip to form a chip size semiconductor device. The electrode terminal is plated to make the surface of the electrode terminal covered with a passivation layer for protecting the electrode terminal from a laser beam. Before or after the passivation layer is formed, the back side of the semiconductor wafer is polished to reduce the thickness of the semiconductor wafer. The surface of the electrode terminal and the back side of the semiconductor wafer are covered with resin to form a laminate. A laser beam from the outside of the laminate is focused to the electrode terminal surface to form a via hole in which the passivation layer is exposed to the bottom surface. The via hole is filled by an electroless plating method to form the conductor part.</p>
申请公布号 KR20040097899(A) 申请公布日期 2004.11.18
申请号 KR20040032479 申请日期 2004.05.08
申请人 SHINKO ELECTRIC INDUSTRIES CO., LTD. 发明人 SORIMACHI HARUO
分类号 H01L23/52;H01L21/3205;H01L21/60;H01L23/12;H01L23/31;(IPC1-7):H01L23/12 主分类号 H01L23/52
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