| 摘要 |
A method for and apparatus of testing a multi-port RAM (random access memory) detect single port faults and inter port shorts in multi-port random access memories. The algorithm performs a conventional single-port test such as MARCH or SMARCH on one port of the memory and performs an inter-port test on all other ports. The algorithm does not impose any extra test time and requires the addition of only a few gates to a conventional single-port BIST controller, independently of the size of the memory. An address to select ports of the multi-port RAM includes a row address signal of a plurality of bits. A specific bit of the row address signal is changed. |
