发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>A semiconductor integrated circuit has over one semiconductor substrate a nonvolatile memory and a logic circuit which uses information stored in the nonvolatile memory to perform logical operation. The nonvolatile memory comprises bit lines (bl and blb), word lines (wl_n), and memory cells (20). The memory cell comprises MOS transistors (M1 and M2) whose gate electrodes are connected with a word line. Information storage is carried out according to whether one source/drain electrode of the MOS transistors is connected with a source line (cs) or floated. During the other periods than a predetermined period in the operation of accessing the memory cell, the potential difference between the source/drain electrodes of the MOS transistors constituting the memory cell is zeroed. Therefore, subthreshold leakage current is prevented from being passed through the memory cell on standby. During the predetermined period in accessing operation, a potential difference is produced between the source/drain electrodes of the MOS transistors. Therefore, the bit line potential can be varied by word line selection. <IMAGE></p>
申请公布号 EP1477990(A1) 申请公布日期 2004.11.17
申请号 EP20020700624 申请日期 2002.02.20
申请人 RENESASTECHNOLOGY CORP.;HITACHI ULSI SYSTEMS CO.,LTD. 发明人 MIYAZAKI, SHINYA;KATOH, KEI;YAMAUCHI, KOUDOH
分类号 G11C16/06;G11C17/12;G11C17/14;H01L27/10;H01L27/115;(IPC1-7):G11C17/14 主分类号 G11C16/06
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