发明名称 |
High frequency switch circuit |
摘要 |
One end of each of five resistors (205-209) is connected to each of the two ends (301,302) and the respective intermediate points of a cascade of four depression-type FETs (101-104), while the other ends (402) of the five resistors are provided with a predetermined voltage. This configuration fixes the source-drain potential of the four FETs. This fixing of the source-drain potential of the FETs permits stable application of a bias voltage for turning ON the FETs between the gate and the source each FET, so as to ensure the ON-OFF switching of the FETs. <IMAGE> |
申请公布号 |
EP1469602(A3) |
申请公布日期 |
2004.11.17 |
申请号 |
EP20040008980 |
申请日期 |
2004.04.15 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
HIDAKA, KENICHI;TARA, KATSUSHI;NAKATSUKA, TADAYOSHI |
分类号 |
H03K17/687 |
主分类号 |
H03K17/687 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|