发明名称 Method for fabricating semiconductor device with loop line pattern structure
摘要 An alternating phase shift mask with dark loops thereon, a memory array fabricated with the alternating phase shift mask, and a method of fabricating the memory. The dark loops in the mask always separate first regions with 180° phase difference from second regions with 0° phase difference to define active areas or gate-lines in a DRAM chip.
申请公布号 US6818515(B1) 申请公布日期 2004.11.16
申请号 US20030600466 申请日期 2003.06.23
申请人 PROMOS TECHNOLOGIES INC. 发明人 LEE BRIAN S.;LEE CHIH-YU
分类号 G03C5/00;G03F1/00;G03F9/00;H01L21/3213;H01L21/336;H01L21/8242;H01L27/108;(IPC1-7):H01L21/336 主分类号 G03C5/00
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