发明名称 Semiconductor device and method of manufacturing the same
摘要 A sidewall oxide layer and a sidewall insulation layer are formed to cover the edge portion of an SOI layer. A channel stopper region is formed in the vicinity of the edge portion of the SOI layer. A protruded insulation layer is formed on the channel stopper region. A gate electrode extends from a region over the SOI layer to the protruded insulation layer and the sidewall insulation layer. In this way, reduction in threshold voltage Vth of a parasitic MOS transistor at the edge portion of the SOI layer can be suppressed.
申请公布号 US6818536(B2) 申请公布日期 2004.11.16
申请号 US20030423960 申请日期 2003.04.28
申请人 RENESAS TECHNOLOGY CORP. 发明人 IPPOSHI TAKASHI;IWAMATSU TOSHIAKI;YAMAGUCHI YASUO
分类号 H01L21/76;H01L21/336;H01L21/762;H01L27/12;H01L29/06;H01L29/786;(IPC1-7):H01L21/00 主分类号 H01L21/76
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