发明名称 Semiconductor constructions
摘要 The invention includes a dual-damascene semiconductor processing method. A semiconductor substrate is provided, and the substrate includes a conductive structure and an insulative layer over the conductive structure. A via is etched through the insulative layer and into the conductive structure, and a resist is formed within the via. A material is formed over the resist and substrate. A portion of the material in contact with the resist is hardened, and another portion of the material that does not contact the resist is not hardened. The portion of the material which is not hardened is removed, and a slot is etched into the insulative layer.
申请公布号 US6818997(B2) 申请公布日期 2004.11.16
申请号 US20020229886 申请日期 2002.08.27
申请人 MICRON TECHNOLOGY, INC. 发明人 TRIVEDI JIGISH D.
分类号 H01L21/768;(IPC1-7):H01L29/40;H01L23/48;H01L29/00;C23F1/00 主分类号 H01L21/768
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