发明名称 Semiconductor chip with fuse unit
摘要 A semiconductor chip includes a logic circuit unit, at least one memory macro unit having a redundant memory cell which recovers a defect cell, electrode pad rows being arranged around the outside of the logic circuit unit and the memory macro unit, and the least one fuse unit group storing addresses of the defect cell and being arranged in a region along any edge of the semiconductor chip, and on the outside of the logic circuit unit, the memory macro unit and the electrode pad rows. Here, the logic circuit unit, the memory macro unit, the electrode pad rows and the fuse unit group are positioned on a semiconductor chip surface.
申请公布号 US6818957(B2) 申请公布日期 2004.11.16
申请号 US20020178748 申请日期 2002.06.25
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 HASEGAWA TAKEHIRO
分类号 H01L21/822;G11C17/18;G11C29/00;H01L21/82;H01L23/525;H01L27/02;H01L27/04;H01L27/10;(IPC1-7):H01L29/76 主分类号 H01L21/822
代理机构 代理人
主权项
地址