发明名称 TEST PATTERN OF SEMICONDUCTOR DEVICE FOR REDUCING TIME FOR EM TEST AND PERFORMING ACCURATE AND SECURE EM TEST
摘要 PURPOSE: A test pattern of a semiconductor device is provided to reduce time for EM(ElectroMigration) test of a test line and perform an accurate and secure EM(ElectroMigration) test by forming at least one of a plurality of branch lines which are the same as a test line in a line width. CONSTITUTION: A test line(30) has at least one of a plurality of branch lines(30A), wherein the branch lines is formed in a pad region. Each of the branch lines is the same as the test line in a line width. A plurality of tungsten patterns(31) are landed on each of the branch lines. An aluminum pad(32) is connected to the tungsten patterns.
申请公布号 KR20040095974(A) 申请公布日期 2004.11.16
申请号 KR20030027008 申请日期 2003.04.29
申请人 HYNIX SEMICONDUCTOR INC. 发明人 EUN, BYEONG SU
分类号 H01L21/66;(IPC1-7):H01L21/66 主分类号 H01L21/66
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