CIRCUIT FOR ALIGNING WRITE DATA AT SEMICONDUCTOR MEMORY DEVICE, ESPECIALLY OBTAINING ENOUGH A TIMING MARGIN REQUIRED FOR ALIGNING DATA

摘要

PURPOSE: A circuit for aligning the write data at a semiconductor memory device is provided to smoothly perform the data write operation by securing the timing margin at the domain cross region. CONSTITUTION: A circuit for aligning the write data at a semiconductor memory device includes a data strobe division unit(420), a latch unit(430-460) and an alignment unit(470-490). The data strobe division unit(420) is synchronized with the rising edge and the falling edge of the inputted first and the second data strobe signals. The data strobe division unit(420) outputs the signals having periods longer than the period of the external clock by two times. The latch unit(430-460) latches the data inputted and controlled by the signal synchronized with the rising edge and the falling edge of the first and the second data strobe signals. And, the alignment unit(470-490) simultaneously outputs the data outputted from the latch unit(430-460) by selectively using the signals outputted from the data strobe division unit(420).