发明名称 Dividing and distributing the drive strength of a single clock buffer
摘要 Devices, methods, and networks that divide and proportionally distribute the drive strength of a clock buffer such that the output drive strength of the clock buffer is divided proportionally among a plurality of outputs from the clock buffer. In one embodiment, the present invention selectively couples adjacent parallel inverters present in a clock buffer to separate, internal distribution wires. The internal distribution wires are selectively coupled to one or more outputs by a connector wire to provide proportional, multiple outputs of the drive strength from the clock buffer to a clock network.
申请公布号 US6819138(B2) 申请公布日期 2004.11.16
申请号 US20020288407 申请日期 2002.11.04
申请人 SUN MICROSYSTEMS, INC. 发明人 HOGENMILLER DAVID;SHARMA HARSH;HOJAT SHERVIN
分类号 G06F1/04;(IPC1-7):H03K19/017;H03K19/003 主分类号 G06F1/04
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