发明名称 MEMORY DEVICE PROVIDED WITH AN IMPROVED REPEATER, IN WHICH THE TIME OF TRANSMITTING DATA IS REDUCED
摘要 PURPOSE: A memory device provided with an improved repeater is provided to reduce the current consumption by decreasing the shift time of the signal carrying on the GIO line when the GIO repeater is utilized. CONSTITUTION: A memory device provided with an improved repeater includes an inverter(400), a delay unit(410), an exclusive NOR gate(420) and a three phase buffer(430). The inverter(400) inverts the signal of the GIO line. The delay unit(410) outputs the output of the inverter(400) by delaying it by a predetermined time. The exclusive NOR gate(420) outputs the signal by exclusively NOR function of the output of the inverter(400) and the output of the delay unit(410). The three phase buffer(430) amplifies the GIO line during a predetermined time by controlling in response to the output of the exclusive NOR gate(420) and the output of the inverter(400). And, the memory device is characterized in that the GIO repeater is operated during a predetermined time after the signal carrying on the GIO line is shifted.
申请公布号 KR20040095988(A) 申请公布日期 2004.11.16
申请号 KR20030027027 申请日期 2003.04.29
申请人 HYNIX SEMICONDUCTOR INC. 发明人 SHIN, BEOM JU
分类号 G11C7/10;(IPC1-7):G11C7/10 主分类号 G11C7/10
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