发明名称 METHOD FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE PREVENTING MOAT AT TOP CORNER OF TRENCH
摘要 PURPOSE: A method for forming an isolation layer of a semiconductor device is provided to increase threshold voltage by restraining moat at trench top corner. CONSTITUTION: A trench is formed in a silicon substrate having a desired lower structure. A stress buffer oxide layer(130) is formed at inner walls of the trench. A liner nitride layer(140) is formed on the buffer oxide layer. Then, a first gap-fill oxide layer(150) is filled in the trench. The first gap-fill oxide layer is partially removed by over-wet dipping to expose the liner nitride layer. The exposed liner nitride layer is removed. Then, a second gap-fill oxide layer is entirely filled in the trench.
申请公布号 KR20040096268(A) 申请公布日期 2004.11.16
申请号 KR20030029148 申请日期 2003.05.07
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KANG, DAE IN
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
代理机构 代理人
主权项
地址