| 摘要 |
The proposed device for simulating graphs contains a control unit and a set of units for simulating the graph nodes. Each unit for simulating the graph nodes contains two shift registers, a switching unit, triggers, AND logic elements, OR logic elements, a displaying unit, and additionally, a pulse distributor, a half-adder, and a time delay element. In the simulation process, from the model of the initial node of the graph, a signal is transmitted that passes to the model of the end node of the graph over two shortest paths, then is transmitted to the initial model of the graph over the shortest paths. Due to these transmissions, two different shortest paths for the signal transmission can be determined, without the graph branches that are common for both the paths. The proposed device is distinctive by its extended functionality range.
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