| 摘要 |
Briefly, in accordance with an embodiment of the invention, an apparatus and method to provide multi-threaded computer processing is provided. The apparatus may include first and second processing units adapted to share a multi-bank cache memory, an instruction pre-decode unit, a multiply-accumulate unit, a coprocessor, and/or a translation lookaside buffer (TLB). The method may include sharing use of a multi-bank cache memory between at least two transaction initiators.
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