发明名称 PULSE WIDTH MODULATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a pulse width modulation circuit capable of outputting a pulse width modulation signal for a prescribed period without the need for supplying a comparatively large amount of a current to a circuit component. SOLUTION: The pulse width modulation circuit is composed of: a pulse signal generating circuit 12 wherein the output terminal of a first transistor Q5 and the input terminal of a second transistor Q6 are coupled by a first coupling circuit including a first capacitor C11 and a first current supply circuit for supplying part of a constant current outputted from a constant current circuit 11 as a charging current to the first capacitor C11, and a pulse signal is outputted from output terminals of the first and second transistors Q5, Q6; and a pulse width modulation signal output section 15 for changing the duty ratio of a pulse signal generated by the pulse signal generating circuit 12 by changing the current supplied from the first current supply circuit to the first capacitor C11 in response to the level variation of an externally received modulation signal. The pulse width modulation circuit is further provided with: a power supply V1 for supplying a driving voltage to the pulse signal generating circuit 12 to drive it, and a voltage control circuit 14 for changing the driving voltage supplied to the pulse signal generating circuit 12 in response to the level variation of the modulation signal. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004320182(A) 申请公布日期 2004.11.11
申请号 JP20030108538 申请日期 2003.04.14
申请人 ONKYO CORP 发明人 HISAMOTO TEISHUN;UMETSU NORIO;MURAYAMA KAZUTAKA
分类号 H03K7/08;(IPC1-7):H03K7/08 主分类号 H03K7/08
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