| 摘要 |
A transmitter circuit for transmitting a sine wave modulated with digital data, where the sine wave includes a clock signal, and a receiver circuit for demodulating the transmitted sine wave, where the receiver circuit extracts the clock signal and the digital data from the sine wave. The transmitter circuit includes digital logic components that allow the transmitted sine wave to include at least one bit per cycle of the sine wave, and the receive circuit includes digital logic components that allow the clock signal and the digital data to be extracted from the sine wave. In various embodiments, the transmitted sine wave includes one bit per cycle, one bit per half cycle, multiple bits per cycle and multiple bits per half cycle.
|
