发明名称 |
Delay-locked loop (DLL) capable of directly receiving external clock signals |
摘要 |
A delay-locked loop (DLL) capable of directly receiving external clock signals is provided. The DLL comprises a level selector, a control signal generator, and an internal clock signal generator. The level selector receives an external clock signal, and directly outputs the external clock signal, or changes a level of the external clock signal and outputs a changed external clock signal, in response to a control signal. The control signal generator generates the control signal. The internal clock signal generator receives an output signal of the level selector and the external clock signal, and generates an internal clock signal synchronized to a phase of an output signal of the level selector.
|
申请公布号 |
US2004222829(A1) |
申请公布日期 |
2004.11.11 |
申请号 |
US20040774933 |
申请日期 |
2004.02.09 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
CHO GUEN-HEE;KIM KYU-HYOUN |
分类号 |
H03L7/081;G11C11/401;G11C11/407;G11C11/409;H03L7/06;H03L7/08;H03L7/099;(IPC1-7):H03L7/06 |
主分类号 |
H03L7/081 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|