发明名称 Using metal peatures to align etches of compound semiconductors
摘要 The present invention provides a method for manufacturing bipolar transistors having reduced parasitic resistance and therefore improved performance compared to conventionally made bipolar transistors. Dry etching of a compound semiconductor in the transistor allows a perimeter of the compound semiconductor layer to be substantially coextensive with a perimeter of an overlying metal layer. This, in turn, reduces the gap between the compound semiconductor and subsequently deposited metal layer to be minimized, thereby reducing the parasitic resistance of the bipolar transistor.
申请公布号 US2004224473(A1) 申请公布日期 2004.11.11
申请号 US20030430499 申请日期 2003.05.06
申请人 LUCENT TECHNOLOGIES INC. 发明人 CHUA LAY-LAY;YANG YANG;LIU CHUN-TING
分类号 H01L21/306;H01L21/308;H01L21/331;(IPC1-7):H01L21/331 主分类号 H01L21/306
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