发明名称 CIRCUIT SIMULATION METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To improve the accuracy of circuit simulation by installing a measure of correcting characteristic variations in a semiconductor device being a component of a circuit in keeping with the actual circuit configuration. SOLUTION: A circuit simulation method includes the steps of: using number of effective stage information 4 including the number of effective stages of inverted logic in a prescribed signal path and transistor characteristic data 5 for a corner width optimizing means 2 to correct a corner parameter 6 and outputting an optimum corner parameter 7; and using a netlist 8 with a stage comprising connection information of the circuit, the optimum corner parameter 7 and an input file 9 for a circuit simulator 3 to carry out circuit simulation. The method carries out the circuit simulation more accurately than prior arts by taking into account the number of inverted logic stages and the number of transistors in parallel configuring the inverted logic. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004319828(A) 申请公布日期 2004.11.11
申请号 JP20030112856 申请日期 2003.04.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SAWARA YASUYUKI;OTANI KAZUHIRO
分类号 G06F17/50;H01L21/00;(IPC1-7):H01L21/00 主分类号 G06F17/50
代理机构 代理人
主权项
地址