| 摘要 |
PROBLEM TO BE SOLVED: To provide a data bus system for realizing high-speed data transfer with simple circuit configuration mutually between a plurality of mutually different digital data processing modules mutually connected via a shared parallel bus. SOLUTION: In the parallel packetized high-speed data bus system with an arbitration function for transferring data at high speed mutually between microprocessor modules in a complicated digital data processing system, the high-speed data bus system includes a fast FIFO queuing operating at 12.5MHz, TTL/CMOS compatible level clocking signals, single bus master arbitration, DMA, and unique module addressing for DMA and multiprocessors. The data processing modules are mutually connected by a shared parallel packetized data bus, and access control for each of the data processing modules is performed by a single sequential arbitration bus. Namely, a requesting module in these data processing modules launches its peculiar address onto the sequential arbitration bus and presence/non-presence of a collision with a request from the other module is monitored from the sequential arbitration bus. COPYRIGHT: (C)2005,JPO&NCIPI
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