| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To speed up data writing and reduce the power consumption by reducing the variation of the threshold of a nonvolatile memory cell at data writing. <P>SOLUTION: When writing data in a memory cell MM00, a voltage of about 8V is applied to the memory gate line MGO, a voltage of about 5V is applied to the source line SLO, a voltage of about 1.5V is applied to the selected gate line CGO respectively. At that time, in the writing circuit 9, the writing pulse is 0, the writing latch output is a Hi signal, and a NAND-circuit output is a Lo signal. A constant current of about 1μA flows in a constant current source transistor 12 and the bit line BLO is discharged by a constant current of about 1μA to flow a current in the memory cell MM00. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
