| 摘要 |
A system 100 fabricated on a single integrated circuit chip includes a microprocessor 101 operating from a high speed bus 102 and a peripheral bus 103 operating in conjunction with high speed bus 102 through a bus bridge 113. A first set of processing resources operate from high speed bus 102 and includes an external memory interface 108, a direct memory access engine 105 for controlling the exchange of information through memory interface 108, and a boot memory 104 for storing boot code. A second set of processing resources operate from peripheral bus 103 and includes an interrupt controller 115 for issuing interrupt requests to microprocessor 101, a set of programmable timers 117 for generating timed interrupt signals, and a phase locked loop 131 for generating timing signals.
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