| 摘要 |
PURPOSE: A memory device preventing operation error due to a repeater by comprising a transistor with a low threshold voltage is provided to prevent operation error during a read operation reading row data continuously. CONSTITUTION: According to a main amplifier(100), PMOS transistors(101,102) are connected to a LIO(Local Input Output) line and a LIOB(Local Input Output Bar) line respectively and receive an equalization control signal(EQ control) through their gates. A differential amplifier(103) is connected to the LIO line and the LIOB line and amplifies read data. A PMOS transistor(107) receives a positive output of the differential amplifier and is connected to a power supply voltage. An NMOS transistor(108) is connected to the PMOS transistor and receives the positive output of the differential amplifier. An NMOS transistor(309) receives a main amplifier enable signal(MAOE). A delay device(112) delays the main amplifier enable signal. And a latch(111) is connected to a contact point of the PMOS transistor(107) and the NMOS transistor(108).
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